1. Field of the Invention
The invention relates to an orthogonal frequency division multiplexing (OFDM) baseband receiver, and more particularly to an equalizer of an OFDM baseband receiver.
2. Description of the Related Art
FIG. 1 is a block diagram of a portion of an OFDM baseband receiver 100. The OFDM baseband receiver 100 includes a fast Fourier transformation (FFT) module 102, a channel estimation and tracking module 104, an equalizer 106, a reciprocal circuit 108, and a demapper 110. When the OFDM baseband receiver 100 receives an OFDM signal, the OFDM signal is sampled and fed to the FFT module 102 to perform a fast Fourier transformation. The signal Sk before the FFT is called a time domain signal, and the signal Yk after the FFT is called a frequency domain signal. An OFDM signal is transmitted over 52 non-zero subcarriers, and the suffix k indicates the index of the subcarrier. Thus, signal Yk means the portion of the OFDM signal S transmitted over the k-th subcarrier.
Because signal Yk is transmitted over multiple subcarriers and suffers from various levels of channel distortion caused by multi-path fading channels, the signal Yk is delivered to the equalizer 106 to compensate for the channel distortion, otherwise inter-symbol interference (ISI) could damage the signal Yk. The channel estimation and tracking module 104 estimates a channel impulse response Hk of the signal Yk. The channel impulse response Hk represents the channel distortion level of signal Yk. Thus, the equalizer 106 can equalize signal Yk according to the channel impulse response Hk estimated by the channel estimation and tracking module 104.
Ordinary equalizer 106 equalizes the signal Yk according to the following algorithm:
            X      k        =                            Y          k                ×                  Conj          ⁡                      (                          H              k                        )                                                                      H            k                                    2              ;wherein Yk is the input signal of the equalizer 106, Conj(Hk) is the conjugate of channel impulse response Hk and |Hk|2 which is the square of the absolute value of channel impulse response Hk is referred to a channel state information CSI. According to the algorithm, the equalizer 106 requires the inverse value of |Hk|2 to derive the output signal Xk, and the reciprocal circuit 108 is thus created.
Because physically implementing a division for signal processing is difficult, a reciprocal circuit 108 is often implemented with a table which stores multiple exponents and mantissas of the inverse values corresponding to multiple |Hk|2 values. When a |Hk|2 value or a CSI value is calculated, the reciprocal circuit 108 first finds the approximation value closest to the CSI value in the table, and an inverse of the CSI approximation value is then found in the table. Thus, the reciprocal circuit 108 generates an approximation of the inverse of channel state information |Hk|2, or 1/CSI. The 1/CSI value is then delivered to the equalizer 106, and the output signal Xk is generated by the equalizer 106.
The approximation of 1/CSI is not very precise, however, due to the limited number of values stored in the table of the reciprocal circuit 108. When the equalizer 106 uses the approximation to equalize the signal Yk, the error of 1/CSI further induces errors of the output signal Xk, and signal distortion results. If the number of values stored in the table of reciprocal circuit 108 is increased to improve the accuracy of 1/CSI, the reciprocal circuit 108 requires greater memory capacity to store the table, and additional hardware cost is incurred. Thus, a method for solving the problem is needed.